UNIT-VI
1.The addressing mode that specifies operands implicitly in the definition of the
Instruction is
a. Immediate Mode
b. Register Mode
c. Implied Mode
d. Register Indirect Mode
2.The addressing mode that specifies operand in the instruction itself is
a. Immediate Mode
b. Register Mode
c. Implied Mode
d. Register Indirect Mode
3.The addressing mode that specifies register operands is
a. Direct Address mode
b. Register Mode
c. Implied Mode
d. Register Indirect Mode
4.The addressing mode that specifies register containing address of operands is
a. Direct Address mode
b. Register Mode
c. Implied Mode
d. Register Indirect Mode
5.The shift instruction is
a. ROR
b. IN
c. NEG
d. DEC
6.The program control instruction that do not change program sequence directly is
a. BR
b. RET
c. SKP
d. CMP
7.The status bit that is set to 1 if the exclusive-OR of the last two carries is equal to 1 is
a. C (Carry)
b. S (sign)
c. Z (zero)
d. V (Overflow)
8.The program control instruction that sets the status bits by performing logical AND
of the two operands is
a. BR
b. RET
c. SKP
d. TST
9.The program control instruction that sets the status bits by performing a subtraction
between two operands is
a. CMP
b. RET
c. SKP
d. TST
10.The interrupts that arise from illegal or erroneous use of an instruction or data are
a. External interrupts
b. Internal interrupts
c. Subroutine Calls
d. Software interrupts
11.The program control instruction that is used in conjunction with subroutines is
a. BR
b. RET
c. SKP
d. TST
12.The program control instruction that does not need an address field is
a. BR
b. RET
c. SKP
d. TST
13.The characteristic that is not applicable for RISC architecture is
a. Fixed Length instruction format
b. Memory access is limited to load and store instructions
c. Micro program control
d. All operations within registers of CPU
14 .The characteristic that is not applicable for CISC architecture is
a. Fixed Length instruction format
b. A large variety of addressing modes
c. Some specialized instructions
d. Instructions that manipulate operands in memory
15.Internal interrupts are also called as
a. Signals
b. Traps
c. System Calls
d. Subroutine Calls
16.The most computers based on RISC architecture concept use
a. Address generator
b. program counter
c. Instruction register
d. Sub routine register
17.The alternate way of implementing mapping function instead of ROM is
a. Programmed Logic Array
b. using RAM
c. Using Microprocessor
d. using Micro controller
18.The next address generator in a micro programmed control unit is referred to as
a. Address generator
b. Sequencer
c. Instruction register
d. Program counter
19.The process of transferring instruction code bits to an address in control memory
Where the routine is located is referred as
a. address translation
b. Micro program execution
c. Mapping
d. address generation
20.The address of next microinstruction is stored in
a. Control address Register (CAR)
b. Sub routine register (SBR)
c. Instruction register (IR)
d. Program counter (PC)
21.The function of control unit in digital computer is
a. to generate micro operations
b. to update micro operations
c. to initiate sequence of micro operations
d. to add new micro operations
UNIT-VII
1.If the control signals are generated using hardware with conventional logic design
techniques then the control unit is said to be
a. Micro programmed
b. Hardwired
c. Nano programmed
d. Programmed
2.The memory that is part of control unit is
a. Main memory
b. Auxiliary memory
c. Control memory
d. Virtual memory
3.Micro instructions are stored in
a. Main memory
b. Secondary memory
c. Control memory
d. Virtual memory
4.The register used to store return address of sub routine is
a. Control address Register (CAR)
b. Sub routine register (SBR)
c. Instruction register (IR)
d. Program counter (PC)
5.The Pseudo-instruction that specifies first address of a micro program routine is
a. ORG
b. PCTAR
c. DRTAR
d. CALL
6.The symbolic microinstructions that loads SBR with a new value is
a. JMP
b. CALL
c. RET
d. MAP
7.Most computers based on RISC architecture
a. use micro programmed control unit
b. use hardwired control unit
c. use nano programmed control unit
d. does not require control unit
8.The program that translates symbolic micro program into its binary equivalent is
a. Compiler
b. Assembler
c. Interpreter
d. Parser
9.A system uses a control memory of 1024 words of 32bits each. The microinstruction
Has three fields: Condition, Branch address, and Microperation fields. If the microoperation field has 16 bits, how many bits are there in the branch address field and the condition field?
a. Branch address has 10 bits and condition field has 6 bits
b. Branch address has 6 bits and condition field has10 bits
c. Branch address has 8 bits and condition field has 8 bits
d. Branch address has 9 bits and condition field has 7 bits
10.Assume that the control memory is 24 bits wide. The microinstruction has two fields:
Address and Microoperation fields. If the microoperation has 13 bits, how many bits are
there in the address field and what is the size of the control memory?
a. Address field has 11 bits and the size of the control memory is 2048x24 bits.
b. Address field has 10 bits and the size of the control memory is 1024x24bits.
c. Address field has 11 bits and the size of the control memory is 1024x24bits.
d. Address has 24 bits and the size of the control memory is 2048x24bits.
11.Arrange the following with the increasing speed of execution.
a. Horizontal microinstruction, vertical microinstruction, hardwired implementation
b. Vertical microinstruction, horizontal microinstruction, hardwired implementation.
c. Hardwired implementation, vertical microinstruction, horizontal
mincroinstruction.
d. Hardwired implementation, horizontal microinstruction, vertical microinstruction.
12.Arrange the following with the increasing logic of circuitry.
a. Horizontal microinstruction, vertical microinstruction, hardwired implementation
b. Vertical microinstruction, horizontal microinstruction, hardwired implementation.
c. Hardwired implementation, vertical microinstruction, horizontal
Microinstruction.
d. Hardwired implementation, horizontal microinstruction, vertical microinstruction.
13.Which of the following statement(s) is(are) correct ?
a. The horizontal microinstruction requires more bits than vertical microinstruction.
b. Changes can be easily accommodated in hardwired control unit than in micro programmed control unit.
c. Hardwired control unit is cheaper than microprogrammed control unit.
d. Vertical microinstruction canbe executed fascal than horizantal microinstruction
10.Which of the following statement(s) is(are) correct?
a. Variable microinstruction format increases complexity of microprogram control unit.
b. Horizontal micro programmed control unit requires additional circuitry for decoding.
c. Concurrency is fully exploited in vertical microprogrammed control unit than in horizantal
microprogrammed control unit.
d. Variable micro instruction format decreases complexity of microprogram control unit.
11.In performing addition and subtraction of signed 2's complement data, if an overflow
occurs
a. there will an erroneous results in AC
b. AC contains no erroneous result
c. AC becomes zero
d. Content of accumulator has no significance
12.In adding two signed magnitude numbers, parallel adder is implemented with
a. half adders
b. full adders
c. decodes
d. encoders
13.Let A(0111) and B(1001) be two BCD numbers. The sum of A and B in BCD is
a. 0000 with a carry of 1
b. 0110 with a carry of 1
c. 0110 with a carry of 0
d. 0000 with a carry of 1
14.BCD adder performs sum in binary and converts the binary sum to valid BCD
representation whenever the binary sum is greater than 1001. Invalid binary sum is
corrected by
a. adding binary 6 (0110) to the binary sum
b. adding binary 9 (1001) to the binary sum
c. subtracting binary 6 (0110) to the binary sum
d. subtracting binary 9 (1001) to the binary sum
15.The 9`s complement of a BCD number is obtained by complementing the bits in the
coded representation with a correction. The correction is
a. binary 10 (1010) is added to each complemented digit and the carry is discarded after
each addition
b. binary 6 (0110) is added before the digit is complemented
c. binary 10 (1010) is added before the digit is complemented
d. binary 6 ( 0110) is added to each complemented digit and the carry is discarded
16.What will be the quotient and remainder when is divided by in 2's complement
binary representation?
a. Quotient 00000; Remainder 10101
b. Quotient 00000; Remainder 01011
c. Quotient 10101: Remainder 00000
d. Quotient 01011; Remainder 00000
17.What will be the quotient and remainder when is divided by in 2's complement representation?
a. Quotient 00000; Remainder 01011
b. Quotient 00000; Remainder 10101
c. Quotient 00000; Remainder 00000
d. Quotien 01011; Remainder 00000
18.The 9's complement of BCD number 0111 is
a. 1000
b. 1001
c. 0010
d. 0011
19.Consider register A holding decimal 8760 in BCD. The micro operation dshr A (Decimal
shift right register A) produces.
a. 1000 0111 0111 0000
b. 0100 0011 1011 0000
c. 1100 0011 1011 0000
d. 0000 1000 0111 0110
20.Consider register A holding decimal 8760 in BCD. The micro operation dshl A (Decimal
shift left register A) produces.
a. 1000 0111 0110 0000
b. 0000 1110 1100 0000
c. 0111 0110 0000 1000
d. 0111 0110 0000 0000
21.The signed magnitude representation of in BCD is
a. 1001 0010 0111 0101
b. 1111 0010 0111 0101
c. 0001 0010 0111 0101
d. 0000 0010 0111 0101
22.The 9's complement representation of in BCD is
a. 1001 0111 0010 0100
b. 1111 0111 0010 0100
c. 0001 0111 0010 0100
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